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| For Video Equipment MN88831 PCM Audio Decoder LSI for Satellite Broadcasting Tuners (Includes Built-In Digital Filter and D/A Converter) Overview The MN88831 greatly streamlines set design by incorporating a satellite broadcasting PCM audio decoder, a switched capacitor D/A converter, and analog post filter to a single chip. Pin Assignment PO0/MTO PI2 PI1 DVDD BSTIN BSTRM SYNCF DCDI ECDO P2M NAMODE BPO 36 35 34 33 32 31 30 29 28 27 26 25 Features Built-in digital filter using 8-fold oversampling Built-in tertiary - noise shaping D/A converter Reduced jitter noise through use of switched capacitor configuration Built-in analog post filter Built-in digital de-emphasis circuit Choice of microcomputer interfaces with selector pin: 3-wired serial interface or I2 C interface Muting function supporting following settings * Pay-per-view flag detection * Error frequency detection * Detection of control code bit-7 Built-in general-purpose microcomputer I/O port Bit stream input pin supporting 0.4 VP-P input PO1 PO2 PO3 PO4 PC DVSS IVI IVO XI XO IIN OIN 37 38 39 40 41 42 43 44 45 46 47 48 24 23 22 21 20 19 18 17 16 15 14 13 1 2 3 4 5 6 7 8 9 10 11 12 NTI NLOCK NRES DVSS AVDDR VREF OUTR AVSSR BIAS AVSSL OUTL AVDDL Applications Satellite broadcasting tuners (BS, CS) DVDD PO5 PO6/LIBP IFSEL TES0 TES1 CHV CWO/IFMOD CS/SA CCK/SCL CTLI/SDA DVSS (TOP VIEW) QFP048-P-1212A VREF BPO BIAS MTI IVO MN88831 Block Diagram IVI 25 24 43 Data output control Digital audio interface 44 19 16 ECDI 29 Digital filter Digital de-emphasis Range bit detection and correction. Pay-per-view flag detection SW2 ECDO 28 Duplex error detection and correction (DE) A mode data expansion Incompatible data range detection Data interpolation Muting - noise shaper SYNCF (LIBP) (MTO) De-interleaving 30 NLOCK 23 Frame synchronization detection Timing generator Switched capacitor D/A converter BSTRM Descramble control code integration and detection 31 1T Analog post filter SW1 BSTIN Clock generator VCO 32 NRES 22 Microcomputer interface: Serial or I2C bus 34,35 Differential decoder serialization 46 7 4 9 PC XO P2M CHV IFSEL CS/SA NAMODE 41 27 26 10 11 8 Timing generator for D/A converter block (D/A converter block) 36 3 14 18 For Video Equipment 45 47 48 OUTL OUTR XI IIN QIN PI1,PI2 CCK/SCL PO6/LIBP PO0/MTO CTLI/SDA PO1 to PO5 CWO/IFMOD For Video Equipment Absolute Maximum Ratings Parameter Power supply voltage Input voltage Output voltage Output current Power dissipation Operating temperature Storage temperature Symbol VDD VI VO IO PD Topr Tstg Ratings - 0.3 to 7.0 - 0.3 to VDD +0.3 - 0.3 to VDD +0.3 25 480 -20 to +70 -55 to +125 MN88831 Unit V V V mA mW C C Notes: 1. The above ratings represent the maximum values that may be applied without damaging the chip, not the limits for guaranteed operation. 2. If the chip is to be used in the presence of strong electric fields--under a CRT tube, for example--apply shielding to the package surface to ensure proper operation. 3. The power dissipation is for an ambient temperature (Ta) of 70C. 4. The voltages applied to the pins CCK/SCL, CTLI/SDA, CWO/IFMOD, PO0/MTO, PO1-PO5, and PO6/LIBP must be within the range between -0.3V and 5.5V when the power is off. Operating Conditions Parameter Power supply voltage for digital circuits Power supply voltage for analog circuits XI clock frequency XI clock frequency XI clock input amplitude BSTIN input amplitude Ambient temperature during operation Notes: 1. *1 & *2: DV SS=AV SS=0V Symbol DVDD AVDD fXI fXI -- -- Ta Test Conditions (*1) (*2) CHV="H" (256fs mode) CHV="L" (384fs mode) C cut input C cut input min 4.5 4.5 typ 5.0 5.0 12.288 18.432 max 5.5 5.5 Unit V V MHz MHz 0.8 0.35 -20 0.5 3.0 +70 VP-P VP-P C For the logic portions of the microcomputer interface, DVDD min = 4.0V. AV DD covers both AVDDL and AVDDR . AV SS covers both AVSSL and AVSSR . Analog characteristics are only guaranteed for DV DD = AVDD = 5.0V. 2. Always use low-impedance external connections for VDD and VSS . Always connect the two through a bypass capacitor of at least 0.01 F to ensure proper operation. 3. Keep the NRES pin (pin No. 22) at "L" level to prevent operation error of the CTLI/SDA pin in the I2C interface at voltages lower than the guaranteed operating power supply voltage. MN88831 Electrical Characteristics (1) DC characteristics AV DD=DV DD=4.5 to 5.5V, AVSS=DV SS=0V, Ta= -20 to +70C For Video Equipment Parameter Symbol IDD1 Test Conditions No load, VDD=5.5V 384fs No load, VDD=5.5V 256fs min typ 56 56 max 80 80 Unit mA mA Power supply current IDD2 Digital input pins 1 (*1) "H" level input voltage "L" level input voltage Digital input pins 2 (*2) "H" level input voltage "L" level input voltage Digital output pins 1 (*3) "H" level output voltage "L" level output voltage Digital output pins 2 (*4) "L" level output voltage High-impedance output leakage current Digital output pins 3 (*5) "L" level output voltage High-impedance output leakage current Analog output pins VREF pin output pin BIAS pin output pin IVI-IVO inverter Inverter input threshold voltage VTI VREF VBIAS VOL3 ILO2 VOL2 I LO VOH1 VOL1 VIH2 VIL2 VIH1 VIL1 0.7 x DVDD DVSS 0.8 x DVDD DVSS IOH1= -1mA IOL1=+1mA IOL2=+1mA VO=High-impedance state VI=0V to DV DD IOL3=+1mA VI=0V to DV DD VNRES=0V to 0.5V 0.45 x AVDD 0.5 x AVDD DVDD - 0.8 DVDD 0.3 x DVDD DVDD 0.2 x DVDD V V V V V 0.5 0.5 10 V V A 0.5 50 V A V V 0.5 x DVDD 0.75 V Notes: *1: IFSEL, TES0, TES1, CHV, MTI, ECDI, PI1, PI2, IIN, QIN, CWO/IFMOD (C3, C4 only), IVI (C5 only) *2: CS/SA, CCK/SCL, NRES, CTLI/SDA (C6, C7 only) *3: NLOCK, BPO, NAMODE, P2M, ECDO, SYNCF, BSTRM, PC *4: PO0/MTO, PO1 to PO6, CWO/IFMOD, PC (C12 only) *5: CTLI/SDA For Video Equipment Application Circuit Example MN88831 MN88831's built-in final differential addition filter Switched capacitor block output OUTL- OUTL+ MI BIAS OUT approx. 100 OUTL 680 33F 18k PI 4700pF BIAS + 22F Reference voltage Bias voltage for operational amplifier VREF + 22F Structure of Analog Post Filter and Sample Analog Connections MN88831 Package Dimensions (Unit: mm) QFP048-P-1212A For Video Equipment 14.20.4 12.00.3 36 25 (1.6) 12.00.3 13 1 0.8 12 0.30.1 2.00.2 14.20.4 37 24 48 2.4Max. (1.6) (1.1) 0.10.1 0.15 -0.05 +0.10 0 to 10 (0.55) 0.1 SEATING PLANE |
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